1. Field of the Invention
The present invention relates to a semiconductor device comprising a contact formed between an electrode having a metallic conductivity and a silicon surface layer and a method of manufacturing the same, particularly, to the construction of a silicon surface layer containing an impurity in such a high concentration as to bring about a crystal distortion and a method of manufacturing the same, and to a method of forming a contact on a shallow diffusion layer.
2. Description of the Related Art
In accordance with miniaturization of semiconductor devices constituting an MOS integrated circuit, an increase in the contact resistance between a metal wiring and a semiconductor layer emerges as a big problem to be solved in addition to the layer resistance in the gate electrode and source/drain regions. In a transistor of 0.1 .mu.m era, the gate length is as small as 0.1 .mu.m, with the result that the on-resistance in the channel portion is only about 500.OMEGA. or less. On the other hand, when it comes to the contact resistance, each contact is allowed to have a contact resistance on the order of 1 k.OMEGA. to 10 k.OMEGA. in the case where a conventional value of contact resistance per unit area (or contact resistivity), falling in a range of 10.sup.-6 to 10.sup.-7 .OMEGA..multidot.cm.sup.2, is used, because the contact size is as small as 10.sup.-10 cm.sup.2. As a result, the contact resistance, which must originally be a parasitic resistance, becomes higher than that of the channel resistance so as to be predominant and, thus, to control the operating speed of the semiconductor device. For avoiding detrimental effects on the performance of the apparatus, it is necessary to control the value of the contact resistance not to be larger than 20% of the channel resistance.
In general, the contact resistivity is determined by the Schottky barrier height between a metal member and a semiconductor layer and by the concentration of the electrically active impurity in the semiconductor layer, i.e., carrier concentration (electron or hole concentration). For decreasing the contact resistivity, the Schottky barrier height should desirably be lower. Also, it is easily anticipated from the field emission tunneling theory that the impurity concentration should desirably be higher for decreasing the contact resistivity. Let us consider a contact resistance between Al and Si layers. Where the contact resistivity or contact resistance per unit area is about 10.sup.-6 to 10.sup.-7 cm.sup.2, the contact resistance can be decreased to about 1/10, which is substantially equivalent to reduction of the Schottky barrier height by 0.25 eV, by increasing the electrically active impurity concentration from 10.sup.20 cm.sup.-3 to 2.times.10.sup.20 cm.sup.-3.
In order to decrease the Schottky barrier height by 0.25 eV, it is necessary to change the electrode material so as to change the work function. It should be noted in this connection that a decrease of the Schottky barrier height in respect of a p-type Si implies an increase of the Schottky barrier height in respect of an n-type Si. It follows that it is effective to increase the concentration of an electrically active impurity in a semiconductor layer in order to decrease the contact resistance. Several methods have been proposed to date along this line as briefly described below.
First of all, it is proposed to apply a heat treatment at high temperatures for a short time in order to increase the electrically active impurity concentration. In this method, impurity ions are implanted into a semiconductor substrate at a dose of about 10.sup.14 to 10.sup.15 cm.sup.-2, followed by applying a heat treatment at high temperatures for a short time, i.e., 800.degree. to 1050.degree. C. for 20 to 60 seconds, under a nitrogen gas atmosphere so as to recover the crystallinity of the semiconductor substrate and, thus, to form an impurity layer having a high concentration of electrically activated impurity. In this method, however, it is impossible to increase the impurity concentration to a level exceeding the critical concentration of solid solution at a heat treating temperature. For example, it is impossible to achieve a boron (B) concentration of 2.times.10.sup.20 cm.sup.-3 or more in a Si layer. The contact resistivity between Al and Si layers in this case is at least about 10.sup.-7 .OMEGA..multidot.cm.sup.2. It is considered impossible to further decrease the contact resistivity. It should also be noted that the impurity diffusion is brought about if the heat treatment is carried out at higher temperatures for a longer time, making it very difficult to form a shallow impurity diffusion layer. In short, it is impossible to form a shallow impurity diffusion layer while increasing sufficiently the impurity concentration, with the result that it is difficult to decrease sufficiently the contact resistance.
On the other hand, as disclosed in U.S. Pat. No. 5,413,943, it is possible to attain a carrier (hole) concentration corresponding to an activated boron atom concentration of at least 2.times.10.sup.20 cm.sup.-3, by implanting 10.sup.16 cm.sup.-2 or more of boron ions into an Si substrate so as to form B.sub.12. The method disclosed in this U.S. Patent certainly permits decreasing the contact resistivity to about 2.times.10.sup.-8 .OMEGA..multidot.cm.sup.2. However, it is very difficult to obtain a contact resistivity lower than 10.sup.-8 cm.sup.2.
Other than the above described phenomena, a so-called pre-amorphous formation method is also known, in which a surface layer in an Si substrate is made into amorphous in advance of doping by introducing particles such as Si.sup.+ or Ge.sup.+, which are electrically neutral within Si and hardly affect the conductivity of Si, into the Si substrate by means of ion implantation at a dose of about 10.sup.14 to 10.sup.15 cm.sup.-2. Then, a dopant element for achieving a desired conductivity type such as boron is introduced into the substrate by ion implantation at a dose of about 10.sup.14 to 10.sup.15 cm.sup.-2. In this case, the amorphous layer formed in advance by the introduction of Si.sup.+ or Ge.sup.+ serves to prevent elements having a small mass such as boron from being channeled.
In the method outlined above, after a heat treatment, it is possible to obtain an activated impurity concentration higher than a critical concentration of solid solution at the temperature of the heat treatment. Even in this case, however, the lowest contact resistivity achieved between an Al layer and Si substrate is only about 10.sup.-7 .OMEGA..multidot.cm.sup.2 ; it is impossible to further decrease the contact resistivity. It should also be noted that the concentration of the active impurity is lowered with elevation in the temperature in the heat treating step and with increase in the heat treating time. As a result, the concentration of the active impurity is lowered finally to the critical concentration of thermal equilibrium solid solubility and, thus, the contact resistance is increased.
Ge doping is proposed in, for example, Jap. Pat. Appln. KOKAI Publications No. 62-76550, No. 3-345630, No. 4-96325, No. 4-225568, and No. 5-90208. According to the Ge doping method disclosed in any of these prior arts, SiGe is formed by a heat treatment in an Si surface layer doped with Ge, making it possible to decrease the Schottky barrier height between a metal layer and a p-type semiconductor layer by about 0.1 to 0.2 eV. Further, a solid phase crystal growth from an amorphous state is achieved in this prior art, making it possible to achieve a high concentration of the active impurity. As a result, a decrease of the contact resistance is made possible.
Incidentally, Ge has an atomic radius greater than that of Si. Specifically, the lattice constant of Si is 0.543 nm; whereas, the lattice constant of Ge is 0.566 nm. It follows that, where Si is doped with Ge at a high concentration, the Si crystal lattice is distorted so as to provide a major cause of crystal defect. To overcome the difficulty, B having an atomic radius smaller than that of Si is also doped so as to moderate the crystal distortion caused by the Ge doping in Si. In order to moderate the crystal distortion, a heat treatment is carried out in general at 800.degree. C. or higher at which rearrangement of Si and Ge is likely to take place. However, the lowest contact resistivity achieved by this technique is only about 10.sup.-7 .OMEGA..multidot.cm.sup.2, which results in a contact resistance of about 1 k.OMEGA. in a device of 0.1 .mu.m era.